You'll need python3 in order to use migen.
git clone --recursive https://github.com/m-labs/migen.git cd migen ./setup.py install
For the moment, all we are interested in is to see if your migen is correctly installed. We will get into the explanation of the code later. Copy or download this example file
from migen import * # Our simple counter, which increments at every cycle. class Counter(Module): def __init__(self): self.count = Signal(4) # At each cycle, increase the value of the count signal. # We do it with convertible/synthesizable FHDL code. self.sync += self.count.eq(self.count + 1) # Simply read the count signal and print it. # The output is: # Count: 0 # Count: 1 # Count: 2 # ... def counter_test(dut): for i in range(20): print((yield dut.count)) # read and print yield # next clock cycle # simulation ends with this generator if __name__ == "__main__": dut = Counter() run_simulation(dut, counter_test(dut), vcd_name="basic1.vcd")
Now just run it. You should obtain a counter that goes from 0 to 15 and loop again.
Here is an example of what you could obtain.
Finally, Notice that you have a basic.vcd file that has been created. You can open it with gtkwave.