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migen:migen_submodules

Submodules

A module could use another module inside:

class MyFirstModule(Module):
    __init__(self):
      self.led = led = Signal()
      self.comb += led.eq(1)
 
class MyTopModule(Module):
    __init__(self):      
      dummy = MyFirstModule()
      self.submodules += dummy
      led = self.dummy.led      

As we can see, a module has a table called “submodules” which is the instance of other modules that we have to add to it. When we add a module, we migen automatically add it to the module and make it accessible by self.the_name_of_the_module

Testbench example

adder.py
from migen import *
 
class MyAdder(Module):
    def __init__(self, width):
        self.a = a = Signal(width)
        self.b = b = Signal(width)
        self.result =  result = Signal(width+1)
 
        self.comb += result.eq(a + b)
 
class MyTop(Module):
    def __init__(self):
        self.inp = inp = Signal(8)
        #declare the module
        adder = MyAdder(8)
        #add the module to our submodules list
        self.submodules += adder
        #assign this res is the same as the one of the submodules
        self.res = adder.result
        #the adder takes our input and add 3 
        self.comb += [
            adder.a.eq(inp),
            adder.b.eq(3)
        ]
 
def blinky_test(dut):
    for i in range(20):
        yield dut.inp.eq(i)
        yield
        print("{} {}".format(i, (yield dut.res)))
 
dut = MyTop()
run_simulation(dut, blinky_test(dut), vcd_name="adder.vcd")

Out testbench this time takes “i” as an input, and sets “inp” of our module which is connected to the “a” of our submodules that implements an adder. and sets “3” as a constant value to the “b” input of our submodules.

Here again we have a VCD file generated that we'll see with gtkwave. It shows how “b” is constant to “3”. and “a” = “inp” that increments. In our testbench, this value was controlled by “i” in the for loop. The result is as expected.

migen/migen_submodules.txt · Last modified: 2018/01/10 18:38 by po